Instruction sets

9/23/00


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Table of Contents

Instruction sets

von Neumann architecture

CPU + memory

Harvard architecture

von Neumann vs. Harvard

RISC vs. CISC

Instruction set characteristics

Programming model

Multiple implementations

Assembly language

ARM assembly language example

Pseudo-ops

Author: Wayne Wolf

Email: wolf@princeton.edu

Home Page: http://www.ee.princeton.edu/~wolf

Other information:
Overheads for Computers as Components (c) 2000 Morgan Kaufman

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